Subject Code: EC4L003 Subject Name: VLSI Design L-T-P: 3-0-0 Credits: 3
Pre-requisite(s):   Semiconductor Devices, Digital Electronics
Introduction: Design hierarchy, layers of abstraction, integration density and Moore’s law, VLSI design styles, packaging styles, design automation principles; Fabrication Technology: Basic steps of fabrication, bipolar, CMOS and Bi-CMOS fabrication processes, layout design rules; MOS and Bi-CMOS characteristics and circuits: MOS transistor characteristics, MOS switch and inverter, Bi-CMOS inverter, latch-up in CMOS inverter, super-buffers, propagation delay models, switching delay in logic circuits, CMOS analog amplifier; Logic Design: switch logic, gate restoring logic, various logic families and logic gates, PLA; Dynamic Circuits: Basic concept, noise considerations, charge sharing, cascading dynamic gates, domino logic, clocking schemes; Sequential Circuits: Basic regenerative circuits, bi-stable circuit elements, CMOS SR latch, clocked latch and flip-flops; Low-power Circuits: low-power design through voltage scaling, estimation and optimization of switching activity, reduction of switched capacitance, adiabatic logic circuits; Subsystem Design: design of arithmetic building blocks like adders, multipliers, shifters, area-speed-power tradeoff; Semiconductor Memories: SRAM, DRAM, non-volatile memories; Bipolar ECL Inverter: Features of ECL gate, logic design in ECL, single-ended and differential ECL gates; Testability of VLSI: Fault models, scan-based techniques, BIST, test vector generation; Physical Design: Brief ideas on partitioning, placement, routing and compaction.
Text Books:
  1. S. Kang and Y Leblebici, “CMOS Digital Integrated Circuits: Analysis and Design,” 3rd Ed., Tata McGraw Hill, New Delhi, 2003.
  2. J. P. Uyemura, “Introduction to VLSI circuits and Systems,” John Wiley, New Delhi, 2002.
Reference Books:
  1. L Wang, C.Wu and X. wen, VLSI Test Principles and Architecture, Morgan Kaufmann, San Francisco, 2006.